To test complex devices, test engineers must rely on the vector sets generated by verification engineers. Unfortunately, verification engineers—who work in a software simulation environment—often have ...

Verification data is not enough without verification context Most verification environments are good at producing outputs. They generate logs, waveforms, assertions, coverage metrics, pass/fail status ...

There are many ways to categorize engineers—to “slice and dice” them, if you will. I’m speaking figuratively, of course (we don’t want anyone to get any unfortunate ideas…especially since… the ...

Philippe Luc, director of verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer. On one hand the UKESF ...

The pandemic accelerated the sharp rise in professionals working from home. Some people did well while others struggled. This dynamic was particularly acute in the semiconductor industry, which has ...