On June 4, 1968, Robert Dennard was granted a patent for a single transistor, single capacitor DRAM cell design idea. This doesn’t sound earth-shattering today, but back in the sixties, this was a ...

Tokyo – Toshiba Corp. has developed a new cell structure for embedded DRAM on silicon-on-insulator wafers that takes advantage of SOI's specific characteristics. The cell will be an essential ...

The company filed all relevant patent stuff with the United States Patent Application Publication on April 6, 2023, for what it's calling a 3D NAND-like DRAM cell array structure for memory. This new ...

NEO Semiconductor is once again announcing a new technology that hopes to revolutionize the state of DRAM memory. Today, the company unveiled two new 3D X-DRAM cell designs, 1T1C and 3T0C. The ...

As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the ...

What just happened? A Californian company is launching what it calls a ground-breaking solution for increasing DRAM chip density with 3D stacking technology. The new memory chips will greatly improve ...

For applications where performance is of primary importance, designers have traditionally chosen SRAM technology over DRAM. Although commodity DRAM offers much higher density and a lower cost per bit, ...